Vertical Tunneling Transistor Based on Gr-hBN-χ3 Borophene Heterostructure with AA Stack | ||
| AUT Journal of Electrical Engineering | ||
| مقاله 4، دوره 57، شماره 3، 2025، صفحه 461-472 اصل مقاله (2.15 M) | ||
| نوع مقاله: Research Article | ||
| شناسه دیجیتال (DOI): 10.22060/eej.2025.23756.5632 | ||
| نویسندگان | ||
| Reza Abbasi* 1؛ Rahim Faez2؛ Ashkan Horri3 | ||
| 1Department of Electrical and Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran | ||
| 2Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran | ||
| 3Department of Electrical Engineering, Arak Branch, Islamic Azad University, Arak, Iran | ||
| چکیده | ||
| In this paper, the electronic properties of vertical Gr-hBN-χ3 borophene heterostructure (AA stack between Gr and hBN layers), i.e., (Gr-hBN-χ3_AA), have been investigated by density functional theory (DFT). By using the tight-binding (TB) model and least-square fitting for TB and DFT band structures, optimal TB parameters are calculated. By exploiting the non-equilibrium Green function technique and capacitive model, we have investigated the vertical tunneling transistor (VTFET) based on Gr-hBN-χ3_AA. Also, the figure of merit (FOM) of the device, such as the ION/IOFF ratio, subthreshold swing, and intrinsic gate-delay time, has been extracted. We have concluded that decreasing the width of the graphene nanoribbon improves the switching ratio, subthreshold swing, and gate-delay time. Also, compared to previous work (VTFET based on Gr-hBN-χ3_AB), it is seen that changing the stack between Gr and hBN layers has little effect on the FOM of the device. The gate-delay time of the device is 0.011 ps at room temperature. | ||
| کلیدواژهها | ||
| Borophene؛ Density Functional Theory؛ Nonequilibrium Green Function؛ Vertical Tunneling Transistor | ||
| مراجع | ||
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