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Time-Mode Signal Quantization for Use in Sigma-Delta Modulators | ||
AUT Journal of Electrical Engineering | ||
مقاله 6، دوره 48، شماره 1، شهریور 2016، صفحه 53-61 اصل مقاله (615.91 K) | ||
نوع مقاله: Research Article | ||
شناسه دیجیتال (DOI): 10.22060/eej.2016.631 | ||
نویسندگان | ||
Mohsen Tamaddon* 1؛ Mohammad Yavari2 | ||
1Ph.D. Student, Integrated Circuits Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran. | ||
2Associate Professor, Ph.D. Student, Integrated Circuits Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran. | ||
چکیده | ||
The rapid scaling in modern CMOS technology has motivated the researchers to design new analog-to-digital converter (ADC) architectures that can properly work in lower supply voltage. An exchanging the data quantization procedure from the amplitude to the time domain, can be a promising alternative well adapt with the technology scaling. This paper is going to review the recent development in time-based noise-shaping ADCs, so-called as time-based sigma-delta modulators. Two of the most important architectures named as voltage-controlled oscillator (VCO) -based and time-to-digital (TDC) -based sigma-delta modulators (SDMs) are selected to be reviewed in this paper. The intrinsic advantages and limitations of the these structures are briefly explored. To confirm the effectiveness of the time-mode sigma-delta modulators, a TDC-based continuous-time sigma-delta modulator is proposed as an example and the related simulation results performed in MATLAB are illustrated. The simulation results show that the proposed modulator achieves a dynamic range of 67 dB over 30 MHz with the loop filter of order 2. The proposed TDC-based sigma-delta modulator shows the superiority of the time quantization approach in designing the wideband and less complex continuous-time SDMs. | ||
کلیدواژهها | ||
Sigma-delta modulator؛ TDC؛ Time-based circuits؛ VCO | ||
عنوان مقاله [English] | ||
Time-Mode Signal Quantization for Use in Sigma-Delta Modulators | ||
نویسندگان [English] | ||
Mohsen Tamaddon1؛ Mohammad Yavari2 | ||
1Ph.D. Student, Integrated Circuits Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran. | ||
2Associate Professor, Ph.D. Student, Integrated Circuits Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran. | ||
چکیده [English] | ||
The rapid scaling in modern CMOS technology has motivated the researchers to design new analog-to-digital converter (ADC) architectures that can properly work in lower supply voltage. An exchanging the data quantization procedure from the amplitude to the time domain, can be a promising alternative well adapt with the technology scaling. This paper is going to review the recent development in time-based noise-shaping ADCs, so-called as time-based sigma-delta modulators. Two of the most important architectures named as voltage-controlled oscillator (VCO) -based and time-to-digital (TDC) -based sigma-delta modulators (SDMs) are selected to be reviewed in this paper. The intrinsic advantages and limitations of the these structures are briefly explored. To confirm the effectiveness of the time-mode sigma-delta modulators, a TDC-based continuous-time sigma-delta modulator is proposed as an example and the related simulation results performed in MATLAB are illustrated. The simulation results show that the proposed modulator achieves a dynamic range of 67 dB over 30 MHz with the loop filter of order 2. The proposed TDC-based sigma-delta modulator shows the superiority of the time quantization approach in designing the wideband and less complex continuous-time SDMs. | ||
کلیدواژهها [English] | ||
Sigma-delta modulator, TDC, Time-based circuits, VCO | ||
مراجع | ||
[1] T. Christopher, Analog-to-Digital conversion via time-mode signal processing, Ph.D. Dissertation, Dept of Electrical and Computer Engineering, McGill University, Montreal, 2007. [2] Y. Fei, “Design techniques for time-mode noise-shaping analog-to-digital converters: a state-of-the-art review,” Analog Integrated Circuits and Signal Processing, vol. 79. pp 191–206, Nov. 2014. [3] S. Norsworthy, R. Schreier, and G. Temes, Delta-Sigma Data Converters: Theory, Design and Simulation. New York: IEEE Press, 1997. [4] J. M. de la Rosa et al., “Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey,” ,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 58, no. 1, pp. 1–21, Jan. 2011. [5] M. Z. Straayer and M. H. Perrott, “A 12-bit, 10-MHz bandwidth, continuous- time ΔΣ ADC with a 5-bit, 950-MS/s VCO-based quantizer,” IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 805– 814, Apr. 2008. [6] B. D. Vuyst, and P. Rombouts, “A 5-MHz 11-bit self oscillating ΣΔ modulator with a delay-based phase shifter in 0.025 mm2,” IEEE J. of Solid-State Circuits, vol. 46, no. 8, pp. 1919–1927, Aug. 2011. [7] A. Iwata, “The architecture of delta sigma analog-to-digital converters using a VCO as a multi-bit quantizer,” IEEE Trans. Circuits and Systems-II: Exp. Briefs, vol. 46, no. 8, pp. 941 –945, Aug. 1999. [8] B. Drost et al., “Analog Filter Design Using Ring Oscillator Integrators,” IEEE J. Solid-State Circuits, vol. 47, no. 12, pp. 3120–3129 Oct. 2012. [9] J. Kim, T. K. Jang, Y. G. Yoon, and S. Cho, “Analysis and design of voltage-controlled oscillator based analog-to-digital converter,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 1, pp. 18–30, Jan. 2010. [10] M. Park, and M. H. Perrott, “A 78 dB SNDR 87 mW 20 MHz bandwidth continuous-time ΣΔ ADC with VCO-based integrator and quantizer implemented in 0.13 m CMOS,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3344–3358, Dec. 2009. [11] K. Reddy, S. Rao, R. Inti, B. Young, A. Elshazly, M. Talegaonkar, and P. Hanumolu, “A 16-mw 78-dB SNDR 10-MHz BW CT DR ADC using residue-canceling VCO-based quantizer.” IEEE J. Solid-State Circuits, vol. 47, no. 12, pp 1–12, Dec. 2012. [12] G. Taylor and I. Galton, “A mostly digital variable-rate continuous-time ADC ΔΣ modulator,” in Proc. IEEE ISSCC, pp. 298–299, Feb. 2010. [13] S. Rao, B. Young, A. Elshazly, W. Yin, N. Sasidhar, and P. Hanumolu, “ A 71 dB SFDR open loop VCO-based ADC using 2-level PWM modulation,” in Proc. IEEE Symp. VLSI Circuits Digest of Technical Papers, pp. 270-271, Jun. 2011. [14] S. Zaliasl et al., “A 12.5-bit 4MHz 13.8mW MASH ΣΔ modulator with multirated VCO-based ADC,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59, no. 8, pp. 1604–1613, Aug. 2012. [15] G.W. Roberts, and M. Ali-Bakhshian, “A Brief Introduction to Time-to-Digital and Digital-to-Time Converters,” IEEE Trans. Circuits and Systems-II: Exp. Briefs, vol.57, no.3, pp.153-157, March 2010. [16] D. I. Porat, “Review of sub-nanosecond time-interval measurements,” Nuclear Science, IEEE Transactions, vol 20, no .5, pp.36-51 , October. 1973. [17] V. Dhanasekaran et al., “ A Continuous-Time Multi-Bit ΔΣ ADC Using Time Domain Quantizer and Feedback Element,” IEEE J. Solid-State Circuits, vol. 46, no. 3, pp. 639-650, March 2011. [18] L. Hernandez, and E. Prefasi, “Analog to digital conversion using noise shaping and time encoding,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 8, pp. 2026–2037, Aug. 2008. [19] E. Prefasi, L. Hernandez, S. Paton, A. Wiesbauer, R. Gaggl, and E. Pun, “A 0.1 mm , wide bandwidth continuous-time sigma delta ADC based on a time encoding quantizer in 0.13 um CMOS,” IEEE J. Solid-State Circuits, vol. 44, no. 10, pp. 2745–2754, Oct. 2009. [20] C. Taillefer, and G. Roberts, “Delta-sigma A/D converter via time-mode signal processing,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 56, no. 9, pp. 1908–1920, Sept. 2009. [21] M. Straayer, M.H. Perrott, “A 10-bit 20 MHz 38 mW 950 MHz CTRDADC with a 5-bit noise-shaping VCO-based quantizer and DEM circuit in 0.13μm CMOS.” in Proc. IEEE Symp. VLSI Circuits Digest of Technical Papers, pp. 246–247, Jun. 2007. [22] M. Park, and M. H. Perrott, “A single-slope 80 Ms/s ADC using two-step time-to-digital conversion.” in Proc. IEEE Symp. Circuits and Systems, pp. 1125–1128, May. 2009. [23] S. Zaliasl et al., “A 77 dB SNDR, 4MHz MASH ΔΣ modulator with a second-stage multi-rate VCO-based quantizer.” in Proc. IEEE Symp. Custom Integrated Circuits Conference (CICC), pp. 1–4, Sept. 2011. [24] V. Dhanasekaran et al., “A 20 MHz BW 68 dB DR CT ΔΣ ADC based on a multibit time-domain quantizer and feedback element.” in Proc. IEEE Symp. International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pp. 174–175, Feb. 2009. [25] P. Gao, X. Xing, J. Cranincks, and G. Gielen, “ Design of an intrinsically linear double-VCO-based ADC with 2nd-order noise shaping.” in Proc. IEEE Symp. Design, Automation & Test in Europe Conference and Exhibition, pp. 1215–1220, Mar. 2012. [26] T. Jang, J. Kim, Y. Yoon, and S. Cho, “A highly-digital VCO-based analog-to-digital converter using phase interpolator and digital calibration.” IEEE Trans. VLSI Systems, vol. 20, no. 8, pp. 1368–1372, Aug. 2012. [27] Y. Yoon, S. Park, and S. Cho, “A time-based noise shaping analog-to-digital converter using a gated-ring oscillator.” in Proc. IEEE Symp. MTT-S International Microwave Workshop Intelligent Radio for Future Personal Terminals, pp. 1–4, Aug. 2011. [28] U. Wismar, D. Wisland, and P. Andreani, “A 0.2V 0.44μW 20KHz Analog to Digital ΣΔ modulator with 57 fJ/conversion FoM.” in Proc. IEEE Symp. European Solid-State Circuits Conference (ESSCIRC) pp. 187–190, Sept. 2006. [29] Y. Tousi, and E. Afshari, “A miniature 2 mW 4 bit 1.2 GS/s delay-line-based ADC in 65 nm CMOS.” IEEE J. Solid-State Circuits, vol. 46, no. 10, pp. 2312–2325, Oct. 2011. [30] A. Gelb and W. V. Velde, Multiple-Input Describing Functions and Non-Linear System Design, New York: McGraw-Hill, 1968. [31] E. Roza, “Analog-to-digital conversion via duty-cycle modulation,” IEEE Trans. Circuits and Systems-II: Exp. Briefs, vol. 44, no. 11, pp. 907–914, Nov. 1997. [32] M. Tamaddon, and M. Yavari, “An NTF-Enhanced Time-Based Continuous-Time Sigma-Delta Modulator,” Journal of Analog Integrated Circuits and Signal Processing, vol. 85, no. 2, pp. 283-297, Nov. 2015. [33] M. Tamaddon, and M. Yavari, “A wideband time-based continuous-time sigma-delta modulator with 2nd order noise-coupling based on passive elements,” International Journal of Circuit Theory and Applications, published online, Jun. 2015. | ||
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